Q.1) Implement OR and NOR using 2-to-1 multiplexer.
Answer) OR gate:Multiplexer equation: Y = I1.(S) + I0.not(S)
I1 => '1' ; I0 => 'B' ; S => 'A'
Y = 1.(A) + B.not(A)
Upon simplifying above equation, Y = A + B
NOR gate:
Multiplexer equation: Y = I1.(S) + I0.not(S)
I1 => '0' ; I0 => 'not(B)' ; S => 'A'
Y = 0.(A) + not(B).not(A)
Upon simplifying above equation, Y = not(A+B)
Q.2) Implement EX-OR and EX-NOR gates using 2-to-1 multiplexer.
Answer) EX-OR gate:
Multiplexer equation: Y = I1.(S) + I0.not(S)I1 => 'not(B)' ; I0 => 'B' ; S => 'A'
Y = not(B).(A) + B.not(A)
EX-NOR gate:
Multiplexer equation: Y = I1.(S) + I0.not(S)I1 => 'B' ; I0 => 'not(B)' ; S => 'A'
Y = B.(A) + not(B).not(A)
Q.3) Implement latch using 2-to-1 multiplexer.
Answer) Multiplexer equation: Y = I1.(S) + I0.not(S)
I1 => 'D' ; I0 => 'Q' ; S => 'En'Y = D.(En) + Q.not(En)
Q.4) Implement D flip-flop using 2-to-1 multiplexer.
Answer) In the below implementation of flip flop, two muxes are used. The flip flop shown below is a negedge D flip flop.
Q.5) Implement T flip-flip using 2-to-1 multiplexer.
Answer) T flip-flop using D flip-flop :
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