VLSI QnA
This blog provides VLSI interview questions.
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Showing posts with label
Task
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Showing posts with label
Task
.
Show all posts
Thursday, 24 April 2014
Verilog Interview Questions - v1.2
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Q.1) Explain $display, $monitor and $strobe? Answer) All these commands have the same syntax. $display :- The $display displays once the...
Wednesday, 23 April 2014
Verilog Interview Questions - v1.1
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Q.1) A task can have arguments of type : A. Input only. B. Output only. C. Both input and output. ...
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