Google+ VLSI QnA: D Flip Flop
Showing posts with label D Flip Flop. Show all posts
Showing posts with label D Flip Flop. Show all posts

Sunday, 11 May 2014

J-K Flip Flop

Q.1) Explain J-K flip flop.

Answer) The J-K flip-flop is the most versatile of the basic flip-flops. It has the input- following character of the clocked D flip-flop but has two inputs,traditionally labeled J and K. 

JK flip flop

S = not(K.Q)
R = not(J.not(Q))

Analyzing the above circuit :
I) When CLK = ↓, J = 0, K = 1,  
     The output of the flip-flop does not change, i.e. Q and not(Q) retain their state.

II) When CLK = ↑ , J = 0, K = 0
      S = 1; R = 1, 
      Outputs will be retained.

III) When CLK = ↑ J = 0, K = 1
       S = not(Q) ; R = 1, hence according to the operation of S-R latch, 
       Q = 0 and not(Q) = 1.

IV) When CLK = ↑ , J = 1, K = 0
       S = 1; R = Q, hence according to the operation of S-R latch, 
       Q = 1 and not(Q) = 0

V) When CLK = ↑ , J = 1, K = 1
      S = not(Q), R = Q
       a) If Q = 0 and not(Q) = 1, 
               S = 1 and R = 0, hence output Q = 1 and not(Q) = 0.
       b) If Q = 1 and not(Q) = 0,
               S = 0 and R = 1, hence output Q = 0 and not(Q) = 1.

       Hence, we conclude that for J=K=1, the outputs get toggled.

Truth table for JK flip flop
Truth Table for J-K Flip Flop.

Q.2) Draw the excitation table for J-K flip flop.

Answer) From the truth table, we can infer the following points :
              a) When Q retains state '0' ,
                   J = K = 0 and J = 0 , K =1  => J = '0' , K = 'x'

              b) When Q changes from '0' to '1' ,
                   J = K = 1 and J = 1 , K =0  => J = '1' , K = 'x'

              c) When Q changes from '1' to '0' ,
                   J = K = 1 and J = 0 , K =1  => J = 'x' , K = '1'

              d) When Q retains state '1' ,
                   J = K = 0 and J = 1 , K =0  => J = 'x' , K = '0'

Excitation table for JK flip flop
                                                                              Excitation Table for J-K Flip Flop.


Q.3) Convert S-R flip flop into J-K flip flop.

Answer) Given flop : S-R flip flop (Output)
              Flop to be derived : J-K flip flop (Input)

MUST READ : S-R flip flop


Combined truth table for converting SR flip flop into JK flip flop
Combined truth table for converting S-R flip flop into J-K flip flop.


       K map simplification for S      K map simplification for R
K-Map Simplification

JK flip flop using SR flip flop
J-K flip flop using S-R flip flop.

Q.4) Convert J-K flip flop into D flip flop.

Answer) Given flop : J-K flip flop (Output)
              Flop to be derived : D flip flop (Input)

MUST READ : D flip flop


Combined truth table for converting JK flip flop into D flip flop.
Combined truth table for converting J-K flip flop into D flip flop.

          K map simplification for J K map simplification for D
K-Map Simplification

D flip flop using JK flip flop
D flip flop using J-K flip flop.

Q.5) Convert J-K flip flop into S-R flip flop.

Answer) Given flop : J-K flip flop (Output)
              Flop to be derived : S-R flip flop (Input)


Combined truth table for converting JK flip flop into SR flip flop
Combined truth table for conversion of J-K flip flop into S-R flip flop.

   
                 K map simplification for K      K map simplification for J                    

K-Map Simplification

SR flip flop using JK flip flop
S-R flip flop using J-K flip flop.

Q.6) Convert D flip-flop into J-K flip flop.

Answer) Given flop : D flip flop (Output)
              Flop to be derived : J-K flip flop (Input)


Combined truth table for converting D flip flop into JK flip flop
Combined truth table for conversion of D flip flop into J-K flip flop.

K map simplification for D
K-Map Simplification

JK flip flop using D flip flop
J-K flip flop using D flip flop.

D Flip flop

Q.1) What is D type flip-flop?


Answer) The D type flip-flop has one data input 'D' and a clock input. The circuit edge triggers on.the clock input. The flip-flop also has two outputs Q and not(Q). The operation of the D type flip-flop is as follows:
Any input appearing (present state) at the input D, will be produced at the output Q in next clock cycle
Example : If in the current time D = 0 and Q = 1, the next state will be D = (0/1) and Q = 0.

Truth table for D flip flop
Truth Table for D Flip Flop.

Q.2) Draw the excitation table for D - flip flop.


Answer) From the truth table, we can see that,
           When Q retains it state from '0' to '0' or changes from '1' to '0', the value of D is '0'.
           When Q retains it state from '1' to '1' or changes from '0' to '1' , the value of D is '1'.

Excitation table for D flip flop
Excitation table for D flip flop.

Q.3) Draw the circuit diagram of D - flip flop.

Answer) The circuit diagram for D flip flop can be easily drawn by converting the S-R flip flop into D flip flop. For converting one flip flop to another, a truth table is prepared by combining the excitation tables for both the flops. The given flop  (in this case S-R flip flop) acts as outputs and flop to be derived (in this case D flip flop) along with current output and next state output acts as inputs.


Combined truth table for converting SR flip flop into D flip flop
Combined truth table for converting S-R flip flop into D flip flop.

            K map for S simplification         K map for R simplification
K-Map Simplification

D flip flop using SR flip flop
D Flip Flop using S-R Flip Flop.

Q.4) Convert D flip flop into S-R flip flop.

Answer) In this case,
              Given flop : D flip flop (output)
              Flop to be derived : S-R flip flop (input)

Combined truth table for converting D flip flop into SR flip flop
Combined truth table for converting D flip flop into S-R flip flop.

K map simplification for D
K-Map Simplification


SR flip flop using D flip flop
S-R Flip Flop using D Flip Flop.